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Flash memory enters another dimension


03 December 2007

Researchers in Korea and Australia have used stacked layers of gold nanoparticles to boost the storage density of flash memory. 

Flash memories, like those found in USB sticks and memory cards for digital cameras, normally contain just a single layer of devices that trap electric charge and thereby encode digital information. 

Polyelectrolyte/gold nanoparticle flash memory

Three-dimensional scanning nonlinear dielectric microscopy (SNDM) images of the polyelectrolyte/gold nanoparticle flash memory device showing programmed (higher) and erased (lower) states

© Nature

Now Jang-Sik Lee, Jinhan Cho and co-workers at Kookmin University in Seoul, in collaboration with Frank Caruso of the University of Melbourne, have used metal nanoparticles as their charge trap devices, depositing them in alternating layers with an insulating polymer onto a base of hafnium oxide coated silicon substrate. 'By using this method, we can increase the memory density by about 3.6 times in comparison to the single layered devices,' Lee told Chemistry World

The researchers used negatively charged gold nanoparticles, which spread out evenly and separated well because of electrostatic repulsion. The total thickness of the multilayer sandwich was less than 20nm per layer. 

Lee was also involved in the recent development of a multilayer flash memory based on silicon nitride (Si3N4) by researchers working for electronics firm Samsung but he says using nanoparticles gives better results. 'It is very difficult to control the trap density and distribution in such devices, which are quite important in determining the memory characteristics,' he explained. 

By varying pH, ionic strength, and the nature of the nanoparticles embedded in the sandwich structure, manufacturers will be able to tailor the density and performance of the devices to requirements, the researchers believe. For instance, if platinum nanoparticles are used instead of gold, a density of more than ten trillion charge traps per square centimetre can be achieved in a sandwich with four layers. 

Electrochemistry researcher David Schiffrin from the University of Liverpool praised the work. '[This] shows that simple chemical techniques employing nanoparticles can lead to the chemical synthesis of multilayer memory devices,' he told Chemistry World. 'The... method maps a way forward where classical chemistry can be incorporated in the construction of electronic components in the nanoscale. The nanoparticles employed had a dimension of 16nm and further developments with materials of smaller dimensions can be expected thus allowing an impressive increase in . information storage.' 

Michael Gross 

 

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References

J-S Lee et al., Nat. Nanotech., 2007, DOI: 10.1038/nnano.2007.380

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